1.24-bit Delta Sigma stereo ADC
2. Single terminal voltage input: 3 Vp-p high performance
-THD+N: -90 decibels (typical)
-Signal to noise ratio: 99 dB (typical)
-Dynamic range: 99 dB 99 dB (typical)
3. Flexible PCM audio interface
-Master or slave mode selection data format: 24 bit I2 year,
4.24 bits left power-off and reset stop system clock simulation anti alias LPF including sampling rate: 8-96kHz
5. System clock: 256 fS, 384 fS, 512 fS
6. Resolution: 24 bit dual
7. Power supply -5V analog -3.3V digital
8. TSSOP14 package
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